Download Microelectronic Systems N3 Checkbook by R E Vears PDF

By R E Vears

A part of a sequence designed for college students looking technician or identical skills during the classes of the company and Technician Council (BTEC), the Scottish Technical schooling Council, Australian Technical and extra schooling Departments and the East and West African Examinations Council, this textbook of labored difficulties presents assurance of the BTEC unit in microelectronic platforms, syllabus U86/333, dealing largely with subject matters last after the extraction of a unmarried unit at N11 point. The publication concentrates at the 6502, Z80 and 6500 microprocessors

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3 Explain what is meant by the term 'bus conflict' and explain how these are avoided in bus structured systems. 4 With reference to microcomputer systems, explain the following terms: (a) ROM (b) RAM (c) volatile (d) chip enable (e) tri-state logic 5 With the aid of a diagram, explain how tri-state buffers may be used to enable four memory devices to share common data lines. 6 Explain why it is necessary to use a bidirectional data bus in a microcomputer when a unidirectional bus is satisfactory for addresses.

9. Write a 6502 machine code program to poll S%y and increment the display by one for each object counted. The program should start at address 0200i6. READ PORT B YES The polling routine required for this example is different to that used in Problem 3, since the counter must only be incremented once each time that an object breaks the beam of light to the photoelectric sensor. It is therefore necessary to poll the sensor to determine when the beam is broken so that the counter may be incremented, but then to poll the sensor again to determine when the beam is restored before repeating the process.

This process is shown in Fig. 3. A return to the main program is accomplished by the use of RETI or RTI as the last instruction of an ISR. 40 'STORE' or 'OUT' \ / I/O PORT b7 w b6 w b5 ^ b4 ^ b3 ^ b2 ^ PERIPHERAL DEVICE b1 bO (a) 'LOAD' o r ' I N ' ^ * b7 ( * b6 * b5 \ / I/O PORT ( \ ) ( 2 ^ bU M b3 4 b2 * b1 ^ bO PERIPHERAL DEVICE (b) Fig. 1 Registers in use in the main program at the time an interrupt occurs may be required for use in an ISR. Therefore the contents of all registers may need to be saved, since it is not usually possible to predict which registers are in use at the time an interrupt occurs, due to the random nature of an interrupt.

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